Part Number Hot Search : 
A3001 LTC1504A 10016 2500E BC237 TC520 C1208 C560B
Product Description
Full Text Search
 

To Download AT91SAM9G10-EK Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
 AT91SAM9G10-EK Evaluation Board
....................................................................................................................
User Guide
6479A-ATARM-26-May-09
1-2
6479A-ATARM-26-May-09
AT91SAM9G10-EK Evaluation Board User Guide
AT91SAM9G10-EK Evaluation Board User Guide Section 1 Overview.....................................................................................................................1-1
1.1 1.2 1.3 Scope ................................................................................................................................. 1-1 Deliverables ....................................................................................................................... 1-1 The AT91SAM9G10-EK Evaluation Board ........................................................................ 1-1
Section 2 Setting Up the AT91SAM9G10-EK Evaluation Board ........................................................................................................2-1
2.1 2.2 2.3 2.4 2.5 2.6 2.7 Electrostatic Warning ......................................................................................................... 2-1 Requirements..................................................................................................................... 2-1 Layout ................................................................................................................................ 2-2 Powering Up the Board ...................................................................................................... 2-4 Backup Power Supply ........................................................................................................ 2-4 Getting Started ................................................................................................................... 2-4 AT91SAM9G10-EK Block Diagram.................................................................................... 2-5
Section 3 Board Description .......................................................................................................3-1
3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 AT91SAM9G10 Microcontroller ......................................................................................... 3-1 AT91SAM9G10 Block Diagram.......................................................................................... 3-4 Memory .............................................................................................................................. 3-5 Clock Circuitry .................................................................................................................... 3-5 Reset Circuitry.................................................................................................................... 3-5 Shutdown Controller........................................................................................................... 3-5 Power Supply Circuitry....................................................................................................... 3-5 Remote Communication..................................................................................................... 3-5 Audio Stereo Interface ....................................................................................................... 3-5
3.10 User Interface..................................................................................................................... 3-6 3.11 Debug Interface.................................................................................................................. 3-6 3.12 Expansion Slot ................................................................................................................... 3-6 3.13 PIO Usage ......................................................................................................................... 3-7
Section 4 Configuration Straps ...................................................................................................4-1
4.1 Configuration Straps .......................................................................................................... 4-1
Section 5 Schematics .................................................................................................................5-1
5.1 Schematics......................................................................................................................... 5-1
AT91SAM9G10-EK Evaluation Board User Guide
2-1
6479A-ATARM-26-May-09
Section 6 Errata ..........................................................................................................................6-1
6.1 6.2 JTAGSEL S5 Footprint Selector ........................................................................................ 6-1 External Capacitor Values on XIN and XOUT.................................................................... 6-1
Section 7 Revision History..........................................................................................................7-1
7.1 Revision History ................................................................................................................. 7-1
2-2
6479A-ATARM-26-May-09
AT91SAM9G10-EK Evaluation Board User Guide
Section 1 Overview
1.1 Scope
The AT91SAM9G10-EK evaluation kit is an effective platform for evaluating chip performance and developing code for applications based on the AT91SAM9G10. This guide is a description of the hardware included in the AT91SAM9G10-EK evaluation kit. Software files are available embedded into the board's memory upon delivery.
1.2
Deliverables
The AT91SAM9G10-EK package contains the following items: an AT91SAM9G10-EK board one A/B-type USB cable one serial RS232 cable one RJ45 crossed Ethernet cable universal input AC/DC power supply with US and EU plug adapter
1.3
The AT91SAM9G10-EK Evaluation Board
The board is equipped with an AT91SAM9G10 (217-ball LFBGA package) together with the following: 64 Mbytes of SDRAM memory 256 Mbytes of NAND Flash memory one Atmel(R) serial DataFlash(R) one USB device port interface two USB host port interfaces one DBGU serial communication port JTAG/ICE debug interface one Ethernet 100-base TX with three status LEDs one Atmel AT73C213 Audio DAC one 3.5" 1/4 VGA TFT LCD Module with TouchScreen and backlight one Power LED and two general-purpose LEDs four user input pushbuttons one wakeup input pushbutton one reset pushbutton one DataFlash SD/MMC card slot
AT91SAM9G10-EK Evaluation Board User Guide
1-1
6479A-ATARM-26-May-09
two expansion footprint connectors (solder side) one Lithium Coin Cell Battery Retainer for 12 mm cell size dual pitch prototyping area
1-2
6479A-ATARM-26-May-09
AT91SAM9G10-EK Evaluation Board User Guide
Section 2 Setting Up the AT91SAM9G10-EK Evaluation Board
2.1 Electrostatic Warning
The AT91SAM9G10-EK evaluation board is shipped in a protective anti-static package. The board must not be subjected to high electrostatic potentials. In risky ESD environments (e.g. offices with carpet) a grounding strap or similar protective device should be worn when handling the board. Also, generally avoid touching the component pins or any other metallic element of the board.
2.2
Requirements
In order to set up the AT91SAM9G10-EK evaluation board, the following items are required: the AT91SAM9G10-EK evaluation board itself AC/DC power adapter (5V at 2A), 2.1 mm by 5.5 mm
AT91SAM9G10-EK Evaluation Board User Guide
2-1
6479A-ATARM-26-May-09
2-2
2.3 Layout
Figure 2-1.
J18
J15 J7 B4 J6 1 1 RR1 C102 Q5 19 B1 2 20
WARNING 5V ONLY
S9
J19
C1 C93 Y1 R63 R62 R65 R55 C16 C17 R54 TP3 MN14 C107 MN15 C7 R68 C10 DS8 k 1 J8 C54 C55 C47 C49 LINK & ACT k R73 C70 R76 R77 MN8 R78 R80 R81 C123 C122 C121 C120 C51 A1 MN3 MN10 C20 J9 VDDBU 1 BB BP1 WWW.STUDIEL.FR 1 1 1.2V Y2 C19 C126 C46 C44 C68 R28 R31 R27 TP65 TP66 C73 C75 C74 1 R32 C52 MN4 R34 C69 TP64 TP63 R72 C72 DS7 VDDOSC+VDDPLL C48 C111 C113 C87 Q6 R75 R25 R26 k C110 C112 R66 R64 A4 A1
SERIAL DEBUG PORT
R2
DS1
k C91 C94 C95 J12 Q1 TP1 1 5V 3.3V S7 S8 GND R12 R11 C11 R9 SHDN 5V C57 MN5 J5 1
1.2V
R4 MN2
R3
C8
J3 1 POWER LED MN13 J13
ETHERNET 10/100
J20
C3
J2
C2
1
3.3V
1
Q2
ETM TRACE PORT 1
VDDCORE
R6
1
R30 R29
C9
R5
MN1
3.3V
3.3V
AT91SAM9G10-EK Layout - Top View
C4
PORT C
MN11
1
TOUCH SCREEN
1 MN16 R82
J23
R18
CONTROLLER
R74
R23
C56 C53
R83 R84 R79 L5 C115 C84
FULL DS2 k DUPLEX DS3 k SPEED DS4 C50
TP2
3.3V
5V
GND
PORT A
C45
GND
PORT B
C125 C124 1
AT91SAM9261-EK
C66 C67
5V GND GND 3.3V GND GND VDDBU GND WKUP NRST NC NC GND GND 30 31 28 29 26 27 24 25 23 22 21 20 19 18 16 17 15 14 13 12 11 10 8 9 7 6 4 5 2 3 0 1 GND GND 30 31 29 28 26 27 25 24 22 23 21 20 18 19 17 16 14 15 13 12 10 11 9 8 6 7 5 4 2 3 J24 0 1 GND GND 1 31 30 28 29 27 26 24 25 23 22 20 21 19 18 16 17 15 14 12 13 11 10 8 9 7 6 5 4 3 2 0 1 GND GND
STUDIEL
DATAFLASH
BOOT MODE SELECT R20
RESET
NANDFLASH
Y3
C60 MN7 1 TP4 J21 1 BP2 J4 C59
AUDIO OUT
BP6
CR1 C92
1
USB HOST INTERFACE
USB DEVICE INTERFACE
J10
GND
6479A-ATARM-26-May-09
EXT. CLOCK JTAG/ICE CONNECTOR
BP3 BP4 BP5
J1
FORCE POWERON
WAKE UP
R19 MN6B MN6A
AT91SAM9G10-EK Evaluation Board User Guide
GND
Figure 2-2.
C101
C100 R60 R56 C96
R70
S2
S4
S3
S5
C103
C104
S6
R57 C97
R61
C106
C105
S22
S21
R53
R52
R69
C98
C99
R58
F1
L4
F2
C5
S23
R67
C28
80 C13 C15 C39
AT91SAM9G10-EK Layout - Bottom View
79
C41
C42
C21
C35 C119 S24 C118 C27 C23 C25 C38 C24 C117 C116 C33 C43 C32 C29 C31 C37 C36 R85 R24 S25 S26 R22 C34 C26 R21 C40
C77
R16
R71
C78
C71
S14
SD CARD/MMC CARD DATAFLASH CARD INTERFACE S16 S15
R14
R17
2 1
C22
J22
C76
C79
C30
L2
C18
S10
C14
C61 L1
C12
S13
R7
AT91SAM9G10-EK Evaluation Board User Guide
C109 R51 S19 R50 J17 R8 C63 C62 S20 120 119 C6 C64 C108 C114 R59 R10 CR2 2 R13 J16 R15 S12 C58 1 R1
2-3
6479A-ATARM-26-May-09
2.4
Powering Up the Board
AT91SAM9G10-EK requires 5V DC (5%). DC power is supplied to the board via the 2.1 mm by 5.5 mm socket (J1). The coaxial power plug center pin is positive polarity.
2.5
Backup Power Supply
The user has the possibility to add a battery (3V Lithium Battery CR1225 or equivalent) in order to permanently power the backup part of the device. In this case, J9 configuration must to be set in position 1, 2. Refer to Table 4-1, "Configuration Jumpers and Straps".
2.6
Getting Started
The AT91SAM9G10-EK evaluation board is delivered with an embedded demo and documentation files allowing the user to begin evaluating the AT91 ARM Thumb 32-bit microcontroller quickly. Simply power the board and connect it to the USB port of your PC to open it. Also, please refer to the AT91 web site, www.atmel.com/products/AT91/, for the most up-to-date information on getting started with the AT91SAM9G10-EK.
2-4
6479A-ATARM-26-May-09
AT91SAM9G10-EK Evaluation Board User Guide
2.7
AT91SAM9G10-EK Block Diagram
Block Diagram
Figure 2-3.
ETHERNET 10/100 JTAG/ICE RJ45
DBGU RS232
HEADPHONE OUT
TFT 320 x 240 1/4 VGA DISPLAY WITH TOUCHSCREEN
ADM3202A POWER SUPPLY 5 VDC LINEAR REGULATOR VDD3V3 3V3 YELLOW POWER LED 5V SHUTDOWN TRACE PORT ETM EMAC + PHY AT73C213 STEREO AUDIO DAC
RXD
TXD
DRXD - DTXD
HDMA - HDPA
HDMB - HDPB
USB DEVICE
PA11..PA31
USB HOST
1V2
VDDCORE
NRST
DBGU
REG 1V2
PA29 / SPI0_NPCS3
SPI0_NPCS2
1V2
DDM
DDP
SCC1 I2S
NRST
CONTROLLER
SCC1
EBI
SHUTDOWN
VDDPLL VDDOSC
VDDIO XOUT 18.432 MHz EXT CLK INPUT 3V3 1.2V
SYSTEM CONTROLLER
AT91SAM9G10
SPI0_NPCS3 / PA6 SPI0_NPCS0 EBI PIO SPI0 MCI
XIN GNDBU VDDBU SHDN WKUP
SPI0
LCD CONTROLLER
1V2
3 2 1
16 SDRAM 256 Mb 3V3 USER'S GREEN LED
3 2 1
32 16 SDRAM 256 Mb 8 NANDFLASH CS
3V +
DATAFLASH DEVICE
912345678
SD/MMC DATAFLASH CARD READER
AT91SAM9G10-EK Evaluation Board User Guide
MISO - MOSI - SPCK
6479A-ATARM-26-May-09
EXPANSION CONNECTORS
2-5
PIO
TOUCHSCREEN
LCD CONTROL
2-6
6479A-ATARM-26-May-09
AT91SAM9G10-EK Evaluation Board User Guide
Section 3 Board Description
3.1 AT91SAM9G10 Microcontroller
Incorporates the ARM926EJ-STM ARM Thumb Processor - DSP Instruction Extensions - ARM Jazelle(R) Technology for Java(R) Acceleration - 16-KByte Data Cache, 16-KByte Instruction Cache, Write Buffer - 266 MHz core frequency - Memory Management Unit - EmbeddedICETM In-circuit Emulation, Debug Communication Channel Support - Mid-level implementation Embedded Trace MacrocellTM Additional Embedded Memories - 32K Bytes of Internal ROM, Single-cycle Access at Maximum Bus Speed - 160K Bytes of Internal SRAM, Single-cycle Access at Maximum Processor or Bus Speed External Bus Interface (EBI) - Supports SDRAM, Static Memory, NAND Flash and CompactFlash(R) LCD Controller - RGB Addressing - Supports Passive or Active Displays - Up to 16-bits per Pixel in STN Color Mode - Up to 16M Colors in TFT Mode (24-bit per Pixel), Resolution up to 2048 x 2048 USB - USB 2.0 Full Speed (12 Mbits per second) Host Double Port Dual On-chip Transceivers Integrated FIFOs and Dedicated DMA Channels - USB 2.0 Full Speed (12 Mbits per second) Device Port On-chip Transceiver, 2-Kbyte Configurable Integrated FIFOs Bus Matrix - Handles Five Masters and Five Slaves - Boot Mode Select Option - Remap Command Fully Featured System Controller (SYSC) for Efficient System Management, including - Reset Controller, Shutdown Controller, Four 32-bit Battery Backup Registers for a Total of 16 Bytes
AT91SAM9G10-EK Evaluation Board User Guide
3-1
6479A-ATARM-26-May-09
- Clock Generator and Power Management Controller - Advanced Interrupt Controller and Debug Unit - Periodic Interval Timer, Watchdog Timer and Real-time Timer - Three 32-bit PIO Controllers Reset Controller (RSTC) - Based on Power-on Reset Cells, Reset Source Identification and Reset Output Control Shutdown Controller (SHDWC) - Programmable Shutdown Pin Control and Wake-up Circuitry Clock Generator (CKGR) - 32.768 kHz Low-power Oscillator on Battery Backup Power Supply, Providing a Permanent Slow Clock - 3 to 20 MHz On-chip Oscillator and two PLLs Power Management Controller (PMC) - Very Slow Clock Operating Mode, Software Programmable Power Optimization Capabilities - Four Programmable External Clock Signals Advanced Interrupt Controller (AIC) - Individually Maskable, Eight-level Priority, Vectored Interrupt Sources - Three External Interrupt Sources and One Fast Interrupt Source, Spurious Interrupt Protected Debug Unit (DBGU) - 2-wire USART and Support for Debug Communication Channel, Programmable ICE Access Prevention Periodic Interval Timer (PIT) - 20-bit Interval Timer plus 12-bit Interval Counter Watchdog Timer (WDT) - Key Protected, Programmable Only Once, Windowed 12-bit Counter, Running at Slow Clock Real-Time Timer (RTT) - 32-bit Free-running Backup Counter Running at Slow Clock Three 32-bit Parallel Input/Output Controllers (PIO) PIOA, PIOB and PIOC - 96 Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os - Input Change Interrupt Capability on Each I/O Line - Individually Programmable Open-drain, Pull-up Resistor and Synchronous Output Nineteen Peripheral DMA (PDC) Channels Multimedia Card Interface (MCI) - Compliant with Multimedia Cards and SDCards - Automatic Protocol Control and Fast Automatic Data Transfers with PDC, MMC and SDCard Compliant Three Synchronous Serial Controllers (SSC) - Independent Clock and Frame Sync Signals for Each Receiver and Transmitter - IS Analog Interface Support, Time Division Multiplex Support - High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer Three Universal Synchronous/Asynchronous Receiver Transmitters (USART) - Individual Baud Rate Generator, IrDA(R) Infrared Modulation/Demodulation
3-2
6479A-ATARM-26-May-09
AT91SAM9G10-EK Evaluation Board User Guide
- Support for ISO7816 T0/T1 Smart Card, Hardware and Software Handshaking, RS485 Support Two Master/Slave Serial Peripheral Interface (SPI) - 8- to 16-bit Programmable Data Length, Four External Peripheral Chip Selects One Three-channel 16-bit Timer/Counters (TC) - Three External Clock Inputs, Two multi-purpose I/O Pins per Channel - Double PWM Generation, Capture/Waveform Mode, Up/Down Capability Two-wire Interface (TWI) - Master Mode Support, All Two-wire Atmel EEPROMs Supported IEEE(R) 1149.1 JTAG Boundary Scan on All Digital Pins Required Power Supplies: - 1.08V to 1.32V for VDDCORE and VDDBU - 3.0V to 3.6V for VDDOSC and for VDDPLL - 2.7V to 3.6V for VDDIOP (Peripheral I/Os) - 1.65V to 1.95V and 3.0V to 3.6V for VDDIOM (Memory I/Os) Available in a 217-ball LFBGA RoHS-compliant Package
AT91SAM9G10-EK Evaluation Board User Guide
3-3
6479A-ATARM-26-May-09
3.2
AT91SAM9G10 Block Diagram
Figure 3-1. Block Diagram
JTAGSEL TDI TDO TMS TCK NTRST RTCK
ARM926EJ-S Core
ICE Instruction Cache 16K bytes TCM Interface
I D I D
MMU
Data Cache 16K bytes BIU
ETM
PIO
JTAG Boundary Scan
TSYNC TCLK TPS0-TPS2 TPK0-TPK15 BMS D0-D15 A0/NBS0 A1/NBS2/NWR2 A2-A15/A18-A21 A22/REG A16/BA0 A17/BA1 NCS0 NCS1/SDCS NCS2 NCS3/NANDCS NRD/CFOE NWR0/NWE/CFWE NWR1/NBS1/CFIOR NWR3/NBS3/CFIOW SDCK SDCKE RAS-CAS SDWE SDA10 NWAIT A23-A24 A25/CFRNW NCS4/CFCS0 NCS5/CFCS1 CFCE1 CFCE2 NCS6/NANDOE NCS7/NANDWE D16-D31 HDMA HDPA HDMB HDPB
System Controller TST FIQ IRQ0-IRQ2 DRXD DTXD PCK0-PCK3 PLLRCA PLLRCB XIN XOUT AIC PIO DBGU PDC
ITCM
DTCM
EBI CompactFlash NAND Flash
Fast SRAM 160K bytes
PLLA PLLB OSC PMC Fast ROM 32K bytes 5-layer Matrix PIT Peripheral Bridge Peripheral DMA Controller DMA RSTC POR APB PIOA PIOB PIOC FIFO USB Device USB Host FIFO Transceiver Transceiver
WDT
SDRAM Controller
GPBREG XIN32 XOUT32 SHDN WKUP VDDBU GNDBU VDDCORE NRST POR OSC RTT SHDWC
Static Memory Controller
PIO
DDM DDP
DMA MCCK MCCDA MCDA0-MCDA3 FIFO MCI PDC RXD0 TXD0 SCK0 RTS0 CTS0 RXD1 TXD1 SCK1 RTS1 CTS1 RXD2 TXD2 SCK2 RTS2 CTS2 SPI0_NPCS0 SPI0_NPCS1 SPI0_NPCS2 SPI0_NPCS3 SPI0_MISO SPI0_MOSI SPI0_SPCK SPI1_NPCS10 SPI1_NPCS1 SPI1_NPCS12 SPI1_NPCS3 SPI1_MISO SPI1_MOSI SPI1_SPCK LUT LCD Controller LCDD0-LCDD23 LCDVSYNC LCDHSYNC LCDDOTCK LCDDEN LCDCC TF0 TK0 TD0 RD0 RK0 RF0 TF1 TK1 TD1 RD1 RK1 RF1 TF2 TK2 TD2 RD2 RK2 RF2 TCLK0 TCLK1 TCLK2 TIOA0 TIOB0 TIOA1 TIOB1 TIOA2 TIOB2 TWD TWCK
USART0 PDC PDC
SSC0
USART1
PIO PIO
SSC1 PDC PDC PIO SSC2 PDC Timer Counter TC0 TC1 TC2 TWI PDC
USART2 PDC
SPI0 PDC
SPI1
3-4
6479A-ATARM-26-May-09
AT91SAM9G10-EK Evaluation Board User Guide
3.3
Memory
32 Kbytes of Internal ROM 160 Kbytes of Internal High-speed SRAM Atmel serial DataFlash 64 Mbytes of SDRAM memory 256 Mbytes of NAND Flash memory
3.4
Clock Circuitry
18.432 MHz standard crystal for the embedded oscillator 32.768 kHz standard crystal for the slow clock oscillator
3.5
Reset Circuitry
Internal reset controller with a bi-directional reset pin External reset push button
3.6
Shutdown Controller
Programmable shutdown and Wake-Up Wake-up push button
3.7
Power Supply Circuitry
For dynamic power consumption, the AT91SAM9G10 consumes a maximum of 50 mA on VDDCORE at maximum speed in typical conditions (1.2V, 25C), processor running full-performance algorithm On-board 1.2V high efficiency step-down charge pump regulator with shutdown control On-board 3.3V linear regulator with shutdown control
3.8
Remote Communication
One Serial interface (DBGU COM Port) via RS-232 DB9 male socket USB V2.0 Full-speed Compliant, 12 Mbits per second (UDP) Two USB Host port V2.0 Full-speed Compliant, 12 Mbits per second (UHP) One Ethernet 100-base TX with three status LEDs
3.9
Audio Stereo Interface
One Atmel stereo audio DAC AT73C213 One 32 Ohm/20 mW Stereo Headset output (J20) with Master Volume and Mute Controls
AT91SAM9G10-EK Evaluation Board User Guide
3-5
6479A-ATARM-26-May-09
3.10
User Interface
Four user input pushbuttons Two user green LEDs One yellow power LED (can be also software controlled) One 1/4 VGA display LCD with Touchscreen and white LED backlight
3.11
Debug Interface
20-pin JTAG/ICE interface connector DBGU COM Port
3.12
Expansion Slot
One DataFlash, SD/MMC card slot All I/Os of the AT91SAM9G10 are routed to peripheral extension footprint connectors (J16 and J17). This allows the developer to check the integrity of the components and to extend the features of the board by adding external hardware components or boards.
3-6
6479A-ATARM-26-May-09
AT91SAM9G10-EK Evaluation Board User Guide
3.13
PIO Usage
Table 3-1. PIO Controller A
I/O Line PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 PA8 PA9 PA10 PA11 PA12 PA13 PA14 PA15 PA16 PA17 PA18 PA19 PA20 PA21 PA22 PA23 PA24 PA25 PA26 PA27 PA28 PA29 PA30 PA31 Peripheral A SPI0_MISO SPI0_MOSI SPI0_SPCK SPI0_NPCS0 SPI0_NPCS1 SPI0_NPCS2 SPI0_NPCS3 TWD TWCK DRXD DTXD TSYNC TCLK TPS0 TPS1 TPS2 TPK0 TPK1 TPK2 TPK3 TPK4 TPK5 TPK6 TPK7 TPK8 TPK9 TPK10 TPK11 TPK12 TPK13 TPK14 TPK15 MCDA1 MCDA2 MCDA3 PCK0 PCK1 PCK2 PCK3 SCK1 RTS1 CTS1 SCK2 RTS2 CTS2 TF1 TK1 TD1 RD1 RK1 RF1 RTS0 SPI1_NPCS1 SPI1_NPCS2 SPI1_NPCS3 SPI0_NPCS1 SPI0_NPCS2 SPI0_NPCS3 A23 A24 YELLOW POWER LED CONTROL (DS1) USER'S PUSH BUTTON INPUT (BP6) USER'S PUSH BUTTON INPUT (BP5) USER'S PUSH BUTTON INPUT (BP4) USER'S PUSH BUTTON INPUT (BP3) TOUCH SCREEN CONTROLLER (MN16) I2S AUDIO DAC AT73C213 (MN15) PA23 PA24 PA25 PA26 PA27 SPI0_NPCS2 SPI0_NPCS3 I2S AUDIO DAC AT73C213 (MN15) LRFS I2S AUDIO DAC AT73C213 (MN15) BCLK I2S AUDIO DAC AT73C213 (MN15) SDIN TF1 TK1 TD1 SERIAL DEBUG PORT (J15) SERIAL DEBUG PORT (J15) TOUCH SCREEN CONTROLLER (MN16) BUSY TFT PANEL CONTROL (J23) POWER CONTROL IN GREEN USER'S LED 1 (DS8) GREEN USER'S LED 2 (DS7) DRXD DTXD PA11 PA12 PA13 PA14 Peripheral B MCDA0 MCCDA MCCK Comments SD/MMC/DATAFLASH SOCKET (J9) & DATAFLASH DEVICE & TOUCH SCREEN CONTROLLER & AUDIO DAC SD/MMC/DATAFLASH SOCKET (J9) & DATAFLASH DEVICE & TOUCH SCREEN CONTROLLER & AUDIO DAC SD/MMC/DATAFLASH SOCKET (J9) & DATAFLASH DEVICE & TOUCH SCREEN CONTROLLER & AUDIO DAC DATAFLASH DEVICE or DATAFLASH SOCKET (J9) SD/MMC/DATAFLASH SOCKET (J9) SD/MMC/DATAFLASH SOCKET (J9) SD/MMC/DATAFLASH SOCKET (J9) SPI0_MISO or MCI0_DA0 SPI0_MOSI or MCI0_CDA SPI0_SPCK or MCCK SPI0_NPCS0 MCDA1 MCDA2 SPI0_NPCS3 or MCDA3
AT91SAM9G10-EK Evaluation Board User Guide
3-7
6479A-ATARM-26-May-09
Table 3-2. PIO Controller B
I/O Line PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 PB8 PB9 PB10 PB11 PB12 PB13 PB14 PB15 PB16 PB17 PB18 PB19 PB20 PB21 PB22 PB23 PB24 PB25 PB26 PB27 PB28 PB29 PB30 PB31 Peripheral A LCDVSYNC LCDHSYNC LCDDOTCK LCDDEN LCDCC LCDD0 LCDD1 LCDD2 LCDD3 LCDD4 LCDD5 LCDD6 LCDD7 LCDD8 LCDD9 LCDD10 LCDD11 LCDD12 LCDD13 LCDD14 LCDD15 TF0 TK0 TD0 RD0 RK0 RF0 SPI1_NPCS1 SPI1_NPCS0 SPI1_SPCK SPI1_MISO SPI1_MOSI LCDD2 LCDD3 LCDD4 LCDD5 LCDD6 LCDD7 LCDD10 LCDD11 LCDD12 LCDD13 LCDD14 LCDD15 LCDD19 LCDD20 LCDD21 LCDD22 LCDD23 LCDD16 LCDD17 LCDD18 LCDD19 LCDD20 LCDD21 LCDD22 LCDD23 IRQ2 IRQ1 PCK2 I2S AUDIO DAC AT73C213 (MN15) MCLK PCK2 TFT PANEL CONTROL (J23) TFT PANEL CONTROL (J23) TFT PANEL CONTROL (J23) TFT PANEL CONTROL (J23) TFT PANEL CONTROL (J23) TFT PANEL CONTROL (J23) USB DEVICE INTERFACE (J19) USB_CNX LCDD18 LCDD19 LCDD20 LCDD21 LCDD22 LCDD23 PB29 BLUE BLUE BLUE BLUE BLUE BLUE TFT PANEL CONTROL (J23) TFT PANEL CONTROL (J23) TFT PANEL CONTROL (J23) TFT PANEL CONTROL (J23) TFT PANEL CONTROL (J23) TFT PANEL CONTROL (J23) LCDD10 LCDD11 LCDD12 LCDD13 LCDD14 LCDD15 GREEN GREEN GREEN GREEN GREEN GREEN TFT PANEL CONTROL (J23) TFT PANEL CONTROL (J23) TFT PANEL CONTROL (J23) TFT PANEL CONTROL (J23) TFT PANEL CONTROL (J23) TFT PANEL CONTROL (J23) LCDD2 LCDD3 LCDD4 LCDD5 LCDD6 LCDD7 RED RED RED RED RED RED PCK0 TFT PANEL CONTROL (J23) TFT PANEL CONTROL (J23) TFT PANEL CONTROL (J23) TFT PANEL CONTROL (J23) BACKLIGHT LCDHSYNC LCDDOTCK LCDDEN LCDCC Peripheral B Comments
3-8
6479A-ATARM-26-May-09
AT91SAM9G10-EK Evaluation Board User Guide
Table 3-3. PIO Controller C
I/O Line PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PC8 PC9 PC10 PC11 PC12 PC13 PC14 PC15 PC16 PC17 PC18 PC19 PC20 PC21 PC22 PC23 PC24 PC25 PC26 PC27 PC28 PC29 PC30 PC31 Peripheral A NANDOE NANDWE NWAIT A25/CFRNW NCS4/CFCS0 NCS5/CFCS1 CFCE1 CFCE2 TXD0 RXD0 RTS0 CTS0 TXD1 RXD1 TXD2 RXD2 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 PCK2 PCK3 SCK0 FIQ NCS6 NCS7 SPI1_NPCS2 SPI1_NPCS3 TCLK0 TCLK1 TCLK2 TIOA0 TIOB0 TIOA1 TIOB1 TIOA2 TIOB2 TF2 TK2 TD2 RD2 RK2 RF2 PCK1 NAND FLASH DEVICE (MN6x) CHIP ENABLE (CE) NAND FLASH DEVICE (MN6x) READY/BUSY (R/B) EBI DATA BUS D16 EBI DATA BUS D17 EBI DATA BUS D18 EBI DATA BUS D19 EBI DATA BUS D20 EBI DATA BUS D21 EBI DATA BUS D22 EBI DATA BUS D23 EBI DATA BUS D24 EBI DATA BUS D25 EBI DATA BUS D26 EBI DATA BUS D27 EBI DATA BUS D28 EBI DATA BUS D29 EBI DATA BUS D30 EBI DATA BUS D31 PC14 PC15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 ETHERNET CONTROLLER (MN8) RST ETHERNET CONTROLLER (MN8) IRQ PC10 PC11 Peripheral B NCS6 NCS7 IRQ0 Comments NAND FLASH DEVICE (MN6x) NAND FLASH DEVICE (MN6x) TOUCH SCREEN CONTROLLER (MN16) PENIRQ NANDOE NANDWE IRQ0
AT91SAM9G10-EK Evaluation Board User Guide
3-9
6479A-ATARM-26-May-09
3-10
6479A-ATARM-26-May-09
AT91SAM9G10-EK Evaluation Board User Guide
Section 4 Configuration Straps
4.1 Configuration Straps
Table 4-1 gives details on configuration straps on the AT91SAM9G10-EK evaluation board and their default settings. Table 4-1. Configuration Jumpers and Straps
Designation Default Setting Feature 3.3V Jumper (1) This jumper footprint is provided for 3.3V power consumption measurement use. By default, it is closed. To use this feature, the user has to open the strap by cutting it before soldering a jumper. Forces power on. To use the software shutdown control, J3 must be opened. Enables Boot on the internal ROM Enables Boot on the NCS0 VDDPLL Jumper (1) VDDBU Jumper select (1) 1-2: Lithium 3V Battery 2-3: 1.2V from VDDCORE VDDCORE Jumper (1) NPCS0 select 1-2: DataFlash device (MN7) 2-3: DataFlash card interface (J22) Warning: In this case NPCS03 must be configured as input. Enables the selection of the on-board Nand-Flash device. Remove this jumper to prevent the system boot from that device and to be able to reprogram it. Disables the ICE NTRST input Enables the ICE RTCK return. S6 must be opened Enables the ICE NRST input Selects ICE mode or JTAG mode (See Section 6, Errata) Disables TCK <-> RTCK local loop. If S6 is closed, S3 must be opened. Enables the use of 18.432 MHz crystal. If external clock used, S7-S8 must be opened and S9 closed.
J2
Closed
J3 J4
Closed Open Closed
J8 J9 J12
Closed 2-3 Closed
J21
1-2
J24 S2 S3 S4 S5 S6 S7-S8 S9
Closed Open Closed Closed Open Open Closed Open
AT91SAM9G10-EK Evaluation Board User Guide
4-1
6479A-ATARM-26-May-09
Table 4-1. Configuration Jumpers and Straps
Designation S10 S12 S13 S14 S15 S16 S19 S20 S21 S22 S23 S24 S25 S26 TP1 TP2 TP3 TP4 TP63 TP64 TP65 TP66 Note: Default Setting Closed Open Closed Closed Closed Open Closed Closed Closed Closed Closed Closed Closed Closed N.A N.A N.A N.A N.A N.A N.A N.A Feature Enables the use of SDRAM (NCS1_SDCS) Disables Serial DataFlash write protect. Disables NAND FLASH write protect. Enables the use of interrupt ETHERNET MAC (PC11_FIQ). Enables the use of ETHERNET MAC (NCS2). Disables the use of NWAIT ETHERNET MAC signal (PC2_NWAIT) Enables the use of the User LED DS7 (PA14) Enables the use of the User LED DS8 (PA13) Enables the use of the DBGU RXD signal (PA9) Enables the use of the USB CNX detection (PB29) Enables the use of AUDIO DAC INTERFACE (NPCS03) Enables the use of TOUCH SCREEN CONTROLLER (NPCS02) Enables the use of TOUCH SCREEN CONTROLLER BUSY signal (PA11) Enables the use of TOUCH SCREEN CONTROLLER PENIRQ (PC2_IRQ0) 3.3V Test point. GND Test point. 1.2V Test point. GND Test point. 0 to 3.3V analog user's input 0 to 3.3V analog user's input AGND of TP63 AGND of TP64
1. These jumpers are provided for measuring power consumption. By default, they are closed. To use this feature, the user has to open the strap and insert an ammeter.
4-2
6479A-ATARM-26-May-09
AT91SAM9G10-EK Evaluation Board User Guide
Section 5 Schematics
5.1 Schematics
This section contains the following schematics: Power Supply and Audio AT91SAM9G10 Device SDRAM and NAND Flash Ethernet LCD and User Interface Serial and I/O Expansion
AT91SAM9G10-EK Evaluation Board User Guide
5-1
6479A-ATARM-26-May-09
8
7
6
5
4
3
2
1
5V
POWER
EBI SDRAM INTERFACE EBI SDRAM SDRAM
AUDIO DAC INTERFACE
DATA BUS PIO A,B,C ADRESSE BUS
D
D
HOST
USB INTERFACES
DEVICE
ATMEL ARM9 Processor SAM9G10 (LFBGA217)
CARD READER
C
SERIAL MMC/SD DATAFASH CARD DATA FLASH
PIO A,B,C
NAND FLASH
SHEET 2
DEBUG PORT
C
PIO A,B,C
EXPANSION CONNECTORS
SHEET 4
ICE INTERFACE
B
SHEET 7
DATA BUS
ETHERNET
B
SHEET 3
LCD
SHEET 5
TOUCH SCREEN CONTROLLER
PIO A,B,C
USER INTERFACE
PIOA
USAGE
PIO MUXING
PIOA
A
SHEET 6 NOTE "DNP" means the component is not populated by default
PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 PA8 PA9 PA10 PA11 PA12 PA13 PA14 PA15
SPI0_MISO /MCDA0 SPI0_MOSI /MCCDA SPI0_SPCK SPI0_NPCS0 MCDA1 MCDA2 SPI0_NPCS3 MCDA3 --DBGU_RXD DBGU_TXD BUSY POW ER CONTROL IN USER LED USER LED --
PA16 PA17 PA18 PA19 PA20 PA21 PA22 PA23 PA24 PA25 PA26 PA27 PA28 PA29 PA30 PA31
-TF1 TK1 TD1 ---POW ER LED BP6 BP5 BP4 BP3 SPI0_NPCS2 SPI0_NPCS3 ---
USAGE
PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 PB8 PB9 PB10 PB11 PB12 PB13 PB14 PB15
PIOB
-LCDHSYNC LCDDDOTCK LCDDEN LCDCC --R0 R1 R2 R3 R4 R5 --G0
USAGE
PB16 PB17 PB18 PB19 PB20 PB21 PB22 PB23 PB24 PB25 PB26 PB27 PB28 PB29 PB30 PB31
PIOB
USAGE
PIOC
USAGE
G1 G2 G3 G4 G5 --B0 B1 B2 B3 B4 B5 USB_CNX USB_DP_PUP PCK2
PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PC8 PC9 PC10 PC11 PC12 PC13 PC14 PC15
NANDOE NANDW E IRQ0 /NW AIT -------RST FIQ --#CE R/#B
A
A INIT EDIT REV MODIF.
DES.
PP
15MAY09
DATE
VER. REV.
XXX
XX/XX/XX
DATE SHEET
AT91SAM9G10-EK
TOP LEVEL
SCALE
1/1
1
A
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
1 7
8
7
6
5
4
3
2
8
7
6
5
4
3
2
1
D
3V3
D
10 SQUARE CM COPPER AREA FOR HEAT SINKING WITH NO SOLDER MASK LT1963AEQ-3.3 6
AUDIO DAC INTERFACE
R1 120R 3V3 3V3
REGULATED 5V ONLY J1
5V
1 2
C1 330F + CR1 5V
R2 100K
C2 MN1 10F 10V 2 VIN
GND VOUT GND 3 FB 5 4
J2 TP1 3.3V C3 10F C4 10F TP2 GND
POWER LED
DS1 YELLOW
3
SD 1
3
Q1 IRLML2402
15 12 14 13 11 10
PA23 {3,7}
MN15
PAINN VBAT CBP HPP
AT73C213
DOUT DIN CLK CS SMODE RSTB
R67 100K
1
M5V {6} C5 1uF
C
HPN LPHN PAINP MONOP MONON
25 26 27 28 22 21 24 2 5
SPI0_MISO SPI0_MOSI SPI0_SPCK SPI0_NPCS3 S23
PA0 PA1 PA2 PA29
PA0 {3,4,6,7} PA1 {3,4,6,7} PA2 {3,4,6,7} PA29 {3,7} NRST {3,4,5,7}
PA23
16 30 29 7
2
C6 1uF
VDIG
3V3 VCC_DAC
C
AVDD LINER AVDDHS LINEL VCM AUXP VREF AUXN
Q2 6 Si1563EDH
5
4
5V
8 C1M 5 VIN
6
3
4 C2P VOUT 7
1V2 C7 R3 22uF 100K C8 10PF TP3 1.2V J20 3.5 PHONEJACK STEREO 3 1 4 2 TP4 GND C112 + 100F 6V3
C1P C2M
1
6 31 32 4 3
C113 100F 6V3 +
C107 10uF 9 C111 1 10uF C108 C109 100NF 100NF GND_DAC PCK2 TD1 TF1 TK1
J3 FORCE POWER ON
C110 100NF
2
1
C9 15PF
2
R5 10K
3
R6 10K
C10 4.7uF
TPS60500
FB 1 EN
MN2
10 2
R4 200K
HSR
GND 9
PG
HSL
MCLK SDIN LRFS BCLK
20 17 19 18
R68 47R
PB31 PA19 PA17 PA18
PB31 PA19 PA17 PA18
{3,7} {3,7} {3,7} {3,7}
{3,7} SHDN
INGND
GNDB
GNDD
8
33
23
ADHESIVE FEET Z3 11.1
B
GND_DAC VCC_DAC L4 4.7uH
B
Z4 11.1 Z8 11.1
3V3
Z7 11.1
C114 10F 10V R69 0R GND_DAC
A
A
A INIT EDIT REV MODIF.
DES.
PP
15MAY09
DATE
VER. REV.
XXX
XX/XX/XX
DATE SHEET
AT91SAM9G10-EK
POW ER SUPPLY & AUDIO
8 7 6 5 4 3 2
SCALE
1/1
1
A
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
2 7
8
7
6
5
4
3
2
1
{4,5,6,7} PC[0..15] {2,6,7} PB[0..31] PB3 1K {2,4,6,7} PA[0..31] MN3 BMS PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PC8 PC9 PC10 PC11 PC12 PC13 PC14 PC15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 PB8 PB9 PB10 PB11 PB12 PB13 PB14 PB15 PB16 PB17 PB18 PB19 PB20 PB21 PB22 PB23 PB24 PB25 PB26 PB27 PB28 PB29 PB30 PB31 BOOT MODE SELECT D[0..31] A[0..22] {4,5,7} {4,5,7}
2
LCDVSYNC/PB0 LCDHSYNK/PB1 LCDDOTCK/PCK0/PB2 BMS/LCDDEN/PB3 LCDCC/LCDD2/PB4 LCDD0/LCDD3/PB5 LCDD1/LCDD4/PB6 LCDD2/LCDD5/PB7 LCDD3/LCDD6/PB8 LCDD4/LCDD7/PB9 LCDD5/LCDD10/PB10 LCDD6/LCDD11/PB11 LCDD7/LCDD12/PB12 LCDD8/LCDD13/PB13 LCDD9/LCDD14/PB14 LCDD10/LCDD15/PB15 LCDD11/LCDD19/PB16 LCDD12/LCDD20/PB17 LCDD13/LCDD21/PB18 LCDD14/LCDD22/PB19 LCDD15/LCDD23/PB20 TF0/LCDD16/PB21 TK0/LCDD17/PB22 TD0/LCDD18/PB23 RD0/LCDD19/PB24 RK0/LCDD20/PB25 RF0/LCDD21/PB26 SPI1_NPCS1/LCDD22/PB27 SPI1_NPCS0/LCDD23/PB28 SPI1_SPCK/IRQ2/PB29 SPI1_MISO/IRQ1/PB30 SPI1_MOSI/PCK2/PB31
D
ETM TRACE PORT
PIPESTAT[0] PIPESTAT[1] PIPESTAT[2] TRACESYNC TRACEPKT[0] TRACEPKT[1] TRACEPKT[2] TRACEPKT[3] TRACEPKT[4] TRACEPKT[5] TRACEPKT[6] TRACEPKT[7] VSUPPLY
PA13 PA14 PA15 PA11 PA16 PA17 PA18 PA19 PA20 PA21 PA22 PA23 3V3
EXTTRIG R8 PA12 R9 TRACECLK DNP C11 DNP
C
DNP
38 36 34 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2
37 35 33 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1
TRACEPKT[8] TRACEPKT[9] TRACEPKT[10] TRACEPKT[11] TRACEPKT[12] TRACEPKT[13] TRACEPKT[14] TRACEPKT[15] ICE_NTRST TDI TMS TCK ICE_RTCK TDO ICE_NRST DBGRQ GND
PA24 PA25 PA26 PA27 PA28 PA29 PA30 PA31
R10 DNP
J5 DNP
3V3 {7} DDP {7} DDM {7} HDPA {7} HDMA {7} HDPB {7} HDMB
PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 PA8 PA9 PA10 PA11 PA12 PA13 PA14 PA15 PA16 PA17 PA18 PA19 PA20 PA21 PA22 PA23 PA24 PA25 PA26 PA27 PA28 PA29 PA30 PA31
R11 T12 U13 P10 T13 U14 T14 R12 T15 U16 R13 T16 U15 R14 T17 P13 P14 R15 R17 P16 P17 N15 N14 N16 N17 M14 M15 L15 M16 M17 L14 L16 A12 B12 C12 B14 A13 A14 E17 C17 D17 U17 F16 B10 F17
PA0/SPI0_MISO/MCDA0 PA1/SPI0_MOSI/MCCDA PA2/SPI0_SPCK/MCCK PA3/SPI0_NPCS0 PA4/SPI0_NPCS1/MCDA1 PA5/SPI0_NPCS2/MCDA2 PA6/SPI0_NPCS3/MCDA3 PA7/TW D/PCK0 PA8/TW CK/PCK1 PA9/DRXD/PCK2 PA10/DTXD/PCK3 PA11/TSYNK/SCK1 PA12/TCLK/RTS1 PA13/TPS0/CTS1 PA14/TPS1/SCK2 PA15/TPS2/RTS2 PA16/TPK0/CTS2 PA17/TPK1/TF1 PA18/TPK2/TK1 PA19/TPK3/TD1 PA20/TPK4/RD1 PA21/TPK5/RK1 PA22/TPK6/RF1 PA23/TPK7/RTS0 PA24/TPK8/SPI1_NPCS1 PA25/TPK9/SPI1_NPCS2 PA26/TPK10/SPI1_NPCS3 PA27/TPK11/SPI0_NPCS1 PA28/TPK12/SPI0_NPCS2 PA29/TPK13/SPI0_NPCS3 PA30/TPK14/A23 PA31/TPK15/A24 DDP DDM HDPA HDMA HDPB HDMB TDI TMS TCK RTCK TDO JTAGSEL NTRST PLLRCB
NANDOE/NCS6/PC0 NANDWE/NCS7/PC1 NWAIT/IRQ0/PC2 A25/CFRNW/PC3 NCS4/CFCS0/PC4 NCS5/CFCS1/PC5 CFCE1/PC6 CFCE2/PC7 TXD0/PCK2/PC8 RXD0/PCK3/PC9 RTS0/SCK0/PC10 CTS0/FIQ/PC11 TXD1/NCS6/PC12 RXD1/NCS7/PC13 TXD2/SPI1_NPCS2/PC14 RXD2/SPI1_NPCS3/PC15 D16/TCLK0/PC16 D17/TCLK1/PC17 D18/TCLK2/PC18 D19/TIOA0/PC19 D20/TIOB0/PC20 D21/TIOA1/PC21 D22/TIOB1/PC22 D23/TIOA2/PC23 D24/TIOB2/PC24 D25/TF2/PC25 D26/TK2/PC26 D27/TD2/PC27 D28/RD2/PC28 D29/RK2/PC29 D30/RF2/PC30 D31/PCK1/PC31
1
U2 P6 T4 U3 R6 T6 U5 P7 R7 T7 T8 P8 R8 U8 R9 T9 P1 N2 M3 R1 T1 R2 P3 T2 P4 U1 T3 R4 P5 R5 P2 N3
J4
L17 K16 K17 K15 J17 H17 J16 H16 G17 J15 H14 G16 G15 H15 G14 E16 F14 D16 E15 B17 D15 C16 E14 D14 A17 B16 B15 A15 D13 D12 C13 B13
R7
D
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15
G1 G2 H1 H2 J1 J2 K1 K4 K2 L1 K3 L2 L3 M1 N1 M2 D8 B8 A8 A7 B7 D7 A6 B6 C6 A5 D6 B5 A4 B4 A3 B3 A2 C4 B2 A1 B1 C2 C1 F2 J4 G3 E4 F1 H4 F4 D2 D1 G4 E3 E2 E1 F3 F15
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22
RR1 100K
J6
AT91SAM9G10
2 4 6 8 10 12 14 16 18 20
1 3 5 7 9 11 13 15 ICE_NRST 17 19
ICE_NTRST TDI TMS TCK ICE_RTCK TDO S4 S6
S2
S3 NRST 3V3 S5
NBS0/A0 NW R2/NBS2/A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 BA0/A16 BA1/A17 A18 A19 A20 A21 A22 RAS CAS SDW E SDA10 SDCKE SDCK NCS0 SDCS/NCS1 NCS2 NANDCS/NCS3 CFOE/NRD CFW E/NW E/NW R0 CFIOR/NBS1/NW R1 CFIOW /NBS3/NW R3 NRST
G1 G2 G3 G4 G5
C
4 3 2 1
5 6 7 8
RAS {4,7} CAS {4,7} SDWE {4,7} SDA10 {4,7} SDCKE {4,7} SDCK {4,7} NCS0 {7} SDCS_NCS1 {4,7} NCS2 {5,7} SMCS_NCS3 {7} CFOE_NOE_NRD {5,7} CFWE_NWE_NWR0 {5,7} CFIOR_NBS1_NWR1 {4,7} CFIOW_NBS3_NWR3 {4,7} NRST 3V3 R13 1K NRST {2,4,5,7}
22nF
C12 C13
R11 2.2nF R12
1,5K 1% 2K
U9
C14 15nF
B
C15
1.5nF S7 Y1 18.4320MHz
U10 U12
PLLRCA XOUT
C16 10PF C17 10PF
B
2
J7 DNP
2 4
1 3 5
S8 S9
1
U11 T10 C18 100NF T11 A10
XIN VDDOSC GNDOSC XOUT32
4
32.768 kHz Y2
SMB MALE
C19 10PF C20 10PF
3V3
2
J8
1
1
A11 R10 C21 100NF P9
XIN32 VDDPLL VDDCORE VDDCORE VDDCORE GNDPLL WKUP SHDN VDDCORE
TST NC1 NC2 NC3 VDDIOM VDDIOM VDDIOM VDDIOM VDDIOM VDDIOM VDDIOM VDDIOP VDDIOP VDDIOP VDDIOP VDDIOP VDDIOP VDDIOP GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
C10 A9 C14 D10
R14 1K BP1
VDDOSC + VDDPLL CURRENT MEASURE
3
MN10 R1100D121C
1V2
B11
GNDBU
VDDBU
K14
P12
A16 C7 C11 D3 H8 H9 H10 J3 J8 J9 J10 K8 K9 K10 R3 R16 U4 U7
P11
C15
D11
P15
L4
J14
M4
D9
B9
C9
D5
C3
C5
C8
D4
H3
N4
T5
GND
3V3
U6
A
J10
CR2 MMBD1704A
2
J9
3 2 1
R16 DNP R17
3V3 C43 10F 10V
VDD
OUT
A
2
3
1
WAKE UP
100K C22 100NF C24 C26 100NF 100NF C23 C25 C27 J12 1 2 10F 100NF 100NF 1V2 10V VDDCORE CURRENT MEASURE
5
C28 10F 10V C29 C31 C33 C35 100NF 100NF 100NF 100NF C30 C32 C34 100NF 100NF 100NF C36 C38 C40 C42 100NF 100NF 100NF 100NF C37 C39 C41 100NF 100NF 100NF
R15
1K
C126 100NF
BP2 {7} VDDBU {2,7} SHDN {7} WKUP
7 6
A INIT EDIT REV MODIF.
DES.
PP
15/05/09
DATE
VER. REV.
XXX
XX/XX/XX
DATE SHEET
1
AT91SAM9G10-EK
AT91SAM9G10
SCALE
1/1
1
A
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
3 7
8
4
3
2
8
7
6
5
4
3
2
1
EBI SDRAM INTERFACE
{3,5,7} A[0..22] {3,5,7} D[0..31] {3,7} RAS {3,7} CAS
D
{3,7} {3,7} {3,7} {3,7}
SDW E SDA10 SDCKE SDCK
D
{3,7} CFIOR_NBS1_NW R1 {3,7} CFIOW _NBS3_NW R3 {3,7} SDCS_NCS1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A13 A16 A17 A14 SDCKE
C
SDA10 BA0 BA1
23 24 25 26 29 30 31 32 33 34 22 35 20 21 36 40 37 38
MN4
SDCK
NBS0 15 A0 CFIOR_NBS1_NW R1 39 3V3 R18 100K CAS RAS SDW E
17 18 16 19
A0 MT48LC16M16A2 DQ0 A1 DQ1 A2 DQ2 A3 DQ3 A4 DQ4 A5 DQ5 A6 DQ6 A7 DQ7 A8 DQ8 A9 DQ9 A10 DQ10 A11 DQ11 DQ12 BA0 DQ13 BA1 DQ14 DQ15 A12 N.C VDD VDD CKE VDD VDDQ CLK VDDQ VDDQ DQML VDDQ DQMH VSS CAS VSS RAS VSS VSSQ VSSQ WE VSSQ CS VSSQ
2 4 5 7 8 10 11 13 42 44 45 47 48 50 51 53 1 14 27 3 9 43 49 28 41 54 6 12 46 52
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 3V3
A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A13 A16 A17 A14
SDA10 BA0 BA1
23 24 25 26 29 30 31 32 33 34 22 35 20 21 36 40
MN5
SDCKE SDCK
37 38
NBS2 15 A1 CFIOW _NBS3_NW R3 39 CAS RAS SDW E
C50 C51 C52 C53 100NF 100NF 100NF 100NF C44 C45 C46 100NF 100NF 100NF
17 18 16 19
A0 MT48LC16M16A2 DQ0 A1 DQ1 A2 DQ2 A3 DQ3 A4 DQ4 A5 DQ5 A6 DQ6 A7 DQ7 A8 DQ8 A9 DQ9 A10 DQ10 A11 DQ11 DQ12 BA0 DQ13 BA1 DQ14 DQ15 A12 N.C VDD VDD CKE VDD VDDQ CLK VDDQ VDDQ DQML VDDQ DQMH VSS CAS VSS RAS VSS VSSQ VSSQ WE VSSQ CS VSSQ
2 4 5 7 8 10 11 13 42 44 45 47 48 50 51 53 1 14 27 3 9 43 49 28 41 54 6 12 46 52
D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 3V3
C
C54 C55 C56 C57 100NF 100NF 100NF 100NF C47 C48 C49 100NF 100NF 100NF
S10
256 Mbits
256 Mbits
DUAL FOOTPRINT
{3,5,7} D[0..31] 3V3 3V3 {3,7} {3,7} {3,7} {3,7} {3,7} A21 A22 PC0 PC1 PC14 A21 A22 PC0 PC1 PC14 1 J24 PC15 R85 100K 3V3 MN6A
B
R19 100K
2
16 17 8 18 NANDCE 9 7 19 1 2 3 4 5 6 10 11 14 15 20 21 22 23 24 34 35
16-bit bus width
I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 I/O8 I/O9 I/O10 I/O11 I/O12 I/O13 I/O14 I/O15 N.C18 PRE N.C19 VCC VCC VSS VSS VSS
CLE ALE RE WE CE R/B WP N.C1 N.C2 N.C3 N.C4 N.C5 N.C6 N.C7 N.C8 N.C9 N.C10 N.C11 N.C12 N.C13 N.C14 N.C15 N.C16 N.C17
MT29F2G16AABW P DNP
{3,7} PC15 WP S13
26 28 30 32 40 42 44 46 27 29 31 33 41 43 45 47 39 38 36 37 12 48 25 13
3V3
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15
A21 A22 PC0 PC1 NANDCE PC15 WP
16 17 8 18 9 7 19 1 2 3 4 5 6 10 11 14 15 20 21 22 23 24 25 26
MN6B
8-bit bus width
I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 N.C18 N.C19 N.C20 N.C21 N.C22 N.C23 PRE N.C24 N.C25 N.C26 N.C27 N.C28 VCC VCC VSS VSS
CLE ALE RE WE CE R/B WP N.C1 N.C2 N.C3 N.C4 N.C5 N.C6 N.C7 N.C8 N.C9 N.C10 N.C11 N.C12 N.C13 N.C14 N.C15 N.C16 N.C17
K9F2G08U0A-PCB0
29 30 31 32 41 42 43 44 48 47 46 45 40 39 38 35 34 33 28 27 37 12 36 13
D0 D1 D2 D3 D4 D5 D6 D7
{2,3,6,7} PA0 {2,3,6,7} PA1 {2,3,6,7} PA2
PA0 PA1 PA2
SPI0_MISO SPI0_MOSI SPI0_SPCK SPI0_NPCS0
8 1 2 4 3
MN7
SO SI SCK CS RESET
VCC GND WP
6 7 5
C58 100NF
B
3V3 R20 {2,3,5,7} NRST 100K
AT45DB642D-CNU
S12 W RITE PROTECT NORMALLY OPEN
{3,7} PA3
PA3
1 2 3
J21 R72 10K
3V3
SD CARD / MMC CARD DATAFLASH CARD INTERFACE
J22
{3,7} PA4 3V3
PA4 PA0 PA2 PA1 PA6 PA5
MCDA1 SPI0_MISO MCDA0 SPI0_SPCK MCCK 3V3 SPI0_MOSI MCCDA SPI0_NPCS3 MCDA3 MCDA2 C115 100NF
C60 100NF C59 100NF
{3,7} PA6 {3,7} PA5
8 7 6 5 4 3 2 1 9
FPS009
A
A
A INIT EDIT REV MODIF.
DES.
PP
15MAY09
DATE
VER. REV.
XXX
XX/XX/XX
DATE SHEET
AT91SAM9G10-EK
SDRAM & NANDFLASH
8 7 6 5 4 3 2
SCALE
1/1
1
A
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
4 7
8
7
6
5
4
3
2
1
3V3
D
DS2 DS3 4,7K DS4
GREEN
LINK&ACT
R21 R22 R24
1K 1K 1K
D
3V3 R23
YELLOW FULL DUPLEX GREEN SPEED 100
Note1: 8/16 bit DataBus selection; Removed R27 when using 16-bit mode; otherwise is 8-bit mode.
3V3 MN8 DM9000E
3V3 VCCA
L1
742792093 C61 100NF
NC1 NC2 DVDD DVDD GPIO3 GPIO2 GPIO1 GPIO0 EECS/LED EECK EEDO EEDI DGND LINKACT# DUP# SPEED# CLK20MO DGND MDC MDIO DVDD TX_EN TXD3 TXD2 TXD1
75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
R27 DNP {3,4,7} D[0..15] {2,3,4,7} NRST
C
D15 D14 D13 D12 D11 D10 D9 D8 3V3 {3,4,7} A2 A2
R28 4,7K
{3,7} PC11
PC11 FIQ
S14
76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100
DGND NC LINK_O WAKEUP PW_RST# DGND SD15 SD14 SD13 SD12 SD11 SD10 SD9 SD8 DVDD IO16 CMD SA4 SA5 SA6 SA7 SA8 SA9 DGND INT
DM9000
TXD0 TX_CLK TEST5 RX_CLK RX_ER RX_DV COL CRS DGND RXD3 RXD2 RXD1 RXD0 LINK_I DVDD AVDD TXOTXO+ AGND AGND RXIRXI+ AVDD AVDD BGRES
50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26
R25 49R9 1%
R26 49R9 1%
15
1 TD+
C62 100NF
J13
16
J0026D21 TX+ 1
3 CT 2 TDTX2
C
3V3
VCCA
7 RD+ 6 CT 8 RDC63 100NF R29 49R9 1% R30 49R9 1%
RX+
3
RX-
6
75
75
4
1nF
75
4 5
5
C64 100NF
75
7 8
IOR# IOW# AEN IOWAIT DVDD SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7 RST DGND TEST1 TEST2 TEST3 TEST4 DVDD X2_25M X1_25M DGND SD AGND
B
R32 100K
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
3V3
3V3
R31 6,80K 1%
B
Y3
{3,7} CFOE_NOE_NRD {3,7} CFW E_NW E_NW R0 {3,7} NCS2 D0 D1 D2 D3 D4 D5 D6 D7 {3,7} PC10
1
S15 C66 22PF
2
25MHz C67 22PF 3V3 L2 4.7uH C77 100NF C78 10F 10V 0R VCCA 3V3 3V3 3V3 3V3 3V3 3V3 VCCA VCCA
PC10 RST 3V3 R70 0R R34 4,7K
C76 10F 10V
C79 100NF
C68 100NF
C69 100NF
C70 100NF
C71 100NF
C72 100NF
C73 100NF
C74 100NF
C75 100NF
R71
{3,6,7} PC2
PC2
NWAIT NOT USED
S16
A
A
A INIT EDIT REV MODIF.
DES.
PP
15MAY09
DATE
VER. REV.
XXX
XX/XX/XX
DATE SHEET
AT91SAM9G10-EK
ETHERNET
8 7 6 5 4 3 2
SCALE
1/1
1
A
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
5 7
8
7
6
5
4
3
2
1
3V3
3V3 54132-4097
TOUCH SCREEN CONTROLLER
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
X_RIGHT Y_LOW X_LEFT Y_UP VCTRL Vctrl PCI LCDD18 B0 PB23 B1 PB24 LCDD19 LCDD20 PB25 B2 B3 B4 B5 G0 G1 G2 G3 G4 G5 R0 R1 R2 R3 R4 R5 LCDD21 LCDD22 LCDD23 LCDD10 LCDD11 LCDD12 LCDD13 LCDD14 LCDD15 LCDD2 LCDD3 LCDD4 LCDD5 LCDD6 LCDD7 PB26 PB27 PB28 PB15 PB16 PB17 PB18 PB19 PB20 PB7 PB8 PB9 PB10 PB11 PB12 PB4 LCDCC R75 10K M5V {2} X_LEFT Y_UP X_RIGHT Y_LOW R73 R76 R77 R78 0R 0R 0R 0R C116 10NF C119 10NF C117 C118 10NF 10NF R80 R81 100K 100K TP63
R84 100K R74 47R PA2 PA1 PA0 PA28 PA11 PC2 SPI0_SPCK SPI0_MOSI SPI0_MISO SPI0_NPCS2 BUSY IRQ0 L5 4.7uH C120 10F 10V C122 100NF C121 C123 100NF 100NF R82 0R 3V3
D
Z17 TX09D70VM1CCA
C87 4.7NF
1 2 3 4
MN11
2 3 4 5
MN16
XP YP XM YM
DCLK DIN DOUT CS BUSY PENIRQ
16 14 12 15 13 11 9 1 10
S24 S25 S26
PA2 {2,3,4,7} PA1 {2,3,4,7} PA0 {2,3,4,7} PA28 {3,7} PA11 {3,7} PC2 {3,5,7}
D
RST IN N.C GND
N.C1 N.C2 N.C3 N.C4
8 7 6 5
NOT POPULATED
3
MC34064D
7 8
TP64
IN3 IN4
VREF VCC VCC
R79 0R
1 2
Q6 IRLML2402
PA12
PA12 {3,7} POW ER CONTROL IN AGND TP65 TP66 ADS7843E
GND
6
R83 10K
TWO USER'S ANALOG INPUTS Full-Scale Input Span 0 to VREF VCTRL
C84 100NF
C
DTMG LCDDEN HSYNC
PB3
C
LCDHSYNC PB1
DCLK LCDDDOTCK PB2
3V3
PB[0..31] {2,3,7}
J23 C124 100NF C125 10V 10F
PA27
B
PA27 {3,7}
B
BP3 3V3 GREEN
R50
220R
S19 PA14 PA14 {3,7} BP4 PA26 PA26 {3,7}
DS7
GREEN
R51
220R
S20 PA13 PA13 {3,7} BP5 PA25 PA25 {3,7}
DS8
PA24 BP6
A
PA24 {3,7}
A
A INIT EDIT REV MODIF.
DES.
PP
15MAY09
DATE
VER. REV.
XXX
XX/XX/XX
DATE SHEET
AT91SAM9G10-EK
LCD_USER'S INTERFACE
8 7 6 5 4 3 2
SCALE
1/1
1
A
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
6 7
8
7
6
5
4
3
2
1
C91 100NF
1
MN13 C1+ VCC GND C1C2+ V+
3V3
16 15 2
C92 100NF C93 100NF C95 100NF MALE RIGHT ANGLED J15
C94 100NF R52 0R
3 4
5 11
C2T
V-
6 14 7 13 8
R53 0R
D
EXPANSION CONNECTORS
NOT POPULATED
PA[0..31] {2,3,4,6} PB[0..31] {2,3,6} PC[0..15] {3,4,5,6} PB0 PB2 PB4 PB6 PB8 PB10 PB12 PB14 PB16 PB18 PB20 PB22 PB24 PB26 PB28 PB30 PA0 PA2 PA4 PA6 PA8 PA10 PA12 PA14 PA16 PA18 PA20 PA22 PA24 PA26 PA28 PA30 PC0 PC2 PC4 PC6 PC8 PC10 PC12 PC14 D16 D18 D20 D22 D24 D26 D28 D30 J16
SERIAL DEBUG PORT
RXD TXD
NOT POPULATED
J17
{3} PA10 {3} PA9
PA10 PA9 S21
DBGU_TXD 10 DBGU_RXD 12
T R R ADM3202ARN
1 6 2 7 3 8 4 9 5
D
C
PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 PA8 PA9 PA10 PA11 PA12 PA13 PA14 PA15 PA16 PA17 PA18 PA19 PA20 PA21 PA22 PA23 PA24 PA25 PA26 PA27 PA28 PA29 PA30 PA31 A[0..22] {3,4,5}
PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 PB8 PB9 PB10 PB11 PB12 PB13 PB14 PB15 PB16 PB17 PB18 PB19 PB20 PB21 PB22 PB23 PB24 PB25 PB26 PB27 PB28 PB29 PB30 PB31 D[0..31] {3,4,5}
PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PC8 PC9 PC10 PC11 PC12 PC13 PC14 PC15
B
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 {2,3,4,5} NRST D10 D11 {3} VDDBU D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31
3V3 5V
1.27 PITCH
{3} PB30 {2,3,4,5} NRST
PB30 NRST
USB_DP_PUP
1 2 3
GND
2
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120
PB1 PB3 PB5 PB7 PB9 PB11 PB13 PB15 PB17 PB19 PB21 PB23 PB25 PB27 {3,4} SDCS_NCS1 PB29 {3,4} CFIOR_NBS1_NWR1 PB31 {3,5} CFOE_NOE_NRD {3,4} CFIOW_NBS3_NWR3 PA1 {3,4} RAS PA3 {3,4} SDWE PA5 {3,4} CAS PA7 PA9 PA11 PA13 PA15 PA17 PA19 PA21 PA23 PA25 PA27 PA29 PA31 PC1 PC3 PC5 PC7 PC9 PC11 PC13 PC15 D17 D19 D21 D23 D25 D27 D29 D31
A1 A4 A7 A11 A13 A15 A18 A0 A10 A17 A21 A22
D2 D3 D10 D8 D12 D11 D6 D9
3V3 3V3 5V
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80
10
5V F1 500 mA J18
A2 A3 A6 A9 A12 A14 A16 A19 A5 A8 A20
9
SDCKE {3,4} NCS2 {3,5} CFWE_NWE_NWR0 SDA10 {3,4} NCS0 {3} SDCK {3,4} D1 D0 D5 D7 D4 D15 D13 D14 SMCS_NCS3 {3}
{3,5}
11
F2 500 mA
C
USB HOST INTERFACE
{3} HDMA {3} HDPA HDMA HDPA R54 R55
CCUSBA-32002-30X 39R 39R R56 15K R57 15K C96 47pF C97 47pF C98 100NF
A1 A2 A3 A4 12 34
B1 B2 B3 B4
C99 100NF
3V3 3V3 5V {3} HDMB {3} HDPB
HDMB HDPB
R58 R59
39R 39R R60 15K R61 15K C100 47pF C101 47pF
USER'S GRID AERA
WKUP {3} SHDN {2,3}
{3} PB29
PB29
S22
USB_CNX R63 22K
R62 15K
B
NOT POPULATED
MN14 VCC 3V3
3V3 5V
3V3
5V
5 4
C102 DNP
1
Q5 IRLML6302 DNP
3V3
5V
SN74LVC1G00DBV DNP
3
R64 DNP C103 33PF
2.54 PITCH
USB DEVICE INTERFACE
{3} DDM {3} DDP DDM DDP C105 15PF
R65 R66 C106 15PF
39R 39R
2 3
J19
1 4
C104 100NF
5
6
A
A
A INIT EDIT REV MODIF.
DES.
PP
15MAY09
DATE
VER. REV.
XXX
XX/XX/XX
DATE SHEET
AT91SAM9G10-EK
SERIAL & I/O EXPANSION
SCALE
1/1
1
A
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
7 7
8
7
6
5
4
3
2
5-2
6479A-ATARM-26-May-09
AT91SAM9G10-EK Evaluation Board User Guide
Section 6 Errata
6.1 JTAGSEL S5 Footprint Selector
For JTAG selection, the S5 footprint must never be soldered, otherwise the chip can be damaged. By default, the JTAGSEL input pin integrates a pull-down resistor (ICE mode). To select JTAG mode, the designer should connect the JTAGSEL input pin to VDDBU power.
6.2
External Capacitor Values on XIN and XOUT
The external capacitor values on XIN and XOUT are not correct. The 10 pF capacitors must be replaced by 22 pF capacitors. Please refer to the electrical parameters section of the datasheet.
AT91SAM9G10-EK Evaluation Board User Guide
6-1
6479A-ATARM-26-May-09
6-2
6479A-ATARM-26-May-09
AT91SAM9G10-EK Evaluation Board User Guide
Section 7 Revision History
7.1 Revision History
Table 7-1.
Document 6479A Comments First issue. Change Request Ref.
AT91SAM9G10-EK Evaluation Board User Guide
7-1
6479A-ATARM-26-May-09
7-2
6479A-ATARM-26-May-09
AT91SAM9G10-EK Evaluation Board User Guide
Headquarters
Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600
International
Atmel Asia Unit 1-5 & 16, 19/F BEA Tower, Millennium City 5 418 Kwun Tong Road Kwun Tong, Kowloon Hong Kong Tel: (852) 2245-6100 Fax: (852) 2722-1369 Atmel Europe Le Krebs 8, Rue Jean-Pierre Timbaud BP 309 78054 Saint-Quentin-enYvelines Cedex France Tel: (33) 1-30-60-70-00 Fax: (33) 1-30-60-71-11 Atmel Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan Tel: (81) 3-3523-3551 Fax: (81) 3-3523-7581
Product Contact
Web Site www.atmel.com www.atmel.com/AT91SAM Technical Support AT91SAM Support Atmel techincal support Sales Contacts www.atmel.com/contacts/
Literature Requests www.atmel.com/literature
Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL'S TERMS AND CONDITIONS OF SALE LOCATED ON ATMEL'S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, CONSEQUENTIAL, PUNITIVE, SPECIAL OR INCIDENTAL DAMAGES (INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS OF PROFITS, BUSINESS INTERRUPTION, OR LOSS OF INFORMATION) ARISING OUT OF THE USE OR INABILITY TO USE THIS DOCUMENT, EVEN IF ATMEL HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Atmel makes no representations or warranties with respect to the accuracy or completeness of the contents of this document and reserves the right to make changes to specifications and product descriptions at any time without notice. Atmel does not make any commitment to update the information contained herein. Unless specifically provided otherwise, Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel's products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life.
(c) 2009 Atmel Corporation. All rights reserved. Atmel (R), logo and combinations thereof, DataFlash (R) and others are registered trademarks or trademarks of Atmel Corporation or its subsidiaries. ARM (R), the ARMPowered (R) logo, Thumb(R) and others are registered trademarks or trademarks of ARM Ltd. Other terms and product names may be trademarks of others.
6479A-ATARM-26-May-09


▲Up To Search▲   

 
Price & Availability of AT91SAM9G10-EK

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X